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5.1.2 INTEL I80-TYPE MODE
This mode uses the Read (RD/) and Write (WR/) control signals to transfer information.
Instructions/data are written to the module on the rising edge of WR/ and are read from the
modules after the falling edge of RD/.
WR/
RD/
DB7 IB7 IB7 BF= ' 0 ' DB7
IB6
IB6
IB6
DB6
DB6
IB0
IB0
IB0
DB0
DB0
Write instruction
Write instruction
Read instruction
Write data
RS
Figure 10.
Typical 8-Bit Parallel Interface Sequence Using I80-Type Mode
5.2 SYNCHRONOUS SERIAL INTERFACE MODE
In the synchronous serial interface mode, instructions and data are sent between the host and the
module using 8-bit bytes. Two bytes are required per read/write cycle and are transmitted MSB
first. The start byte contains 5 high bits, the Read/Write (R/W) control bit, the Register Select
(RS) control bit, and a low bit. The following byte contains the instruction/data bits. The R/W
bit determines whether the cycle is a read (high) or a write (low) cycle. The RS bit is used to
identify the second byte as an instruction (low) or data (high).
This mode uses the Strobe (STB) control signal, Serial Clock (SCK) input, and Serial I/O
(SI/SO) line to transfer information. In a write cycle, bits are clocked into the modules on the
rising edge of SCK. In a read cycle, bits in the start byte are clocked into the modules on the
rising edge of SCK. After the minimum wait time, each bit in the instruction/data byte can be
read from the modules after each falling edge of SCK. Each read/write cycle begins on the
falling edge of STB and ends on the rising edge. To be a valid read/write cycle, the STB must go
high at the end of the cycle.
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M0420SD-204SDAR1-3
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